Download ASIC/SoC Functional Design Verification: A Comprehensive by Ashok B. Mehta PDF

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  • October 20, 2017
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By Ashok B. Mehta

This publication describes intimately all required applied sciences and methodologies had to create a complete, sensible layout verification method and atmosphere to take on the hardest activity of ensuring first-pass operating silicon.  the writer first outlines the entire verification sub-fields at a excessive point, with simply enough intensity to permit an engineer to understand the sector ahead of delving into its detail.  He then describes intimately common applied sciences reminiscent of UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog useful Coverage), CDV (Coverage pushed Verification), Low energy Verification (Unified strength structure UPF), AMS (Analog combined sign) verification, digital Platform TLM2.0/ESL (Electronic method point) technique, Static Formal Verification, common sense Equivalency money (LEC), Acceleration, Emulation, Hardware/Software Co-verification, energy functionality zone (PPA) research on a digital platform, Reuse technique from Algorithm/ESL to RTL, and different total methodologies.

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